Cmsemicon CMS32L051 - Port Set Control Register (Psetxx)

V1.2.2
CMS32L051 User Manual |Chapter 2 Pin Function
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2.3.3 Port set control register (PSETxx)
This is the register to set the port output latch in bit units. After a reset signal is generated, the value of
the register becomes 00H.
Register address = base address + offset address; the base address of the port set control register is
0x40040000, and the offset address is shown in the figure below.
Figure 2-3 Format of port set control register
symbol
7
6
5
4
3
2
1
0
address
after reset
R/W
PSET0
0
0
0
0
0
0
PSET01
PSET00
0x010
00H
W
PSET1
PSET17
PSET16
PSET15
PSET14
PSET13
PSET12
PSET11
PSET10
0x011
00H
W
PSET2
PSET27
PSET26
PSET25
PSET24
PSET23
PSET22
PSET21
PSET20
0x012
00H
W
PSET3
0
0
0
0
0
0
PSET31
PSET30
0x013
00H
W
PSET4
0
0
0
0
0
0
PSET41
PSET40
0x014
00H
W
PSET5
0
0
0
0
0
0
PSET51
PSET50
0x015
00H
W
PSET6
0
0
0
0
PSET63
PSET62
PSET61
PSET60
0x016
00H
W
PSET7
0
0
PSET75
PSET74
PSET73
PSET72
PSET71
PSET70
0x017
00H
W
PSET12
0
0
0
PSET124
PSET123
PSET122
PSET121
PSET120
0x01C
00H
W
PSET13
PSET137
PSET136
0
0
0
0
0
PSET130
0x01D
00H
W
PSET14
PSET147
PSET146
0
0
0
0
0
PSET140
0x01E
00H
W
PSETmn
Set control of the Pmn pin (m=0~7, 12~14, n=0~7).
0
No action
1
The corresponding Pmn is set to 1
Note 1: The initial value must be set for the unassigned bits.