CMS32L051 User Manual |Chapter 23 Voltage Detection Circuit
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23.4.2 Settings when used in interrupt mode
The operating mode (interrupt mode (LVIMDS1, LVIMDS0=0, 1)) and the sense voltage (V) are set by
option byte 000C1H LVD). If you set the interrupt mode, it starts operating in the following initial state.
0 (disable overriding of the voltage sense
register (LVIS)).
voltage sense level register (LVIS) to 01H. Bit7 (LVIMD) is 0 (interrupt mode).
bit0 (LVILV) is 1 (voltage detection level: V
LVD
).
interrupt mode operation
After the reset is generated, the interrupt mode (LVIMDS1 for option bytes, LVIMDS0=0, 1) exceeds the
voltage detection level (V
LVD
) at the supply voltage (VDD)) before maintaining the internal reset state of the
LVD. If the supply voltage (V
DD
) exceeds the voltage sense level (V
LVD
), the internal reset of the LVD is
released.
After the internal reset of the LVD is released, if the supply voltage (V
DD
) exceeds the voltage detection level
(V
LVD
), an interrupt request signal for the LVD is generated (INTLVI). When the operating voltage drops, it must
be reset by transferring in deep sleep mode or externally resetting before the operating voltage drops below the
operating voltage range shown in the AC characteristics of the data sheet. During restart operation, it is important
to confirm that the supply voltage has returned to the operating range.
The timing of the generation of interrupt request signals for LVD interrupt mode is shown in Figure 23-5.
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