14.5.12 Arbitration
When multiple master devices generate start conditions at the same time (in the case of STTn is 1
before the STDn bit becomes 1), the communication of the master device is carried out while adjusting the
clock until the data is different. This operation is called arbitration.
In case of arbitration failure, the master device with arbitration failure sets the arbitration failure flag
(ALDn) in the IICA status register n (IICSn) to "1" and sets both the SCLAn and SDAAn lines to the high
impedance state to release the bus.
In the event of the next interrupt request (e.g. a stop condition detected on the 8th or 9th clock), the
software is passed through the ALDn bit as 1 to detect the failure of arbitration.
For the generation timing of interrupt requests, refer to 16.5.8 Generation Timing and Wait Control for
Interrupt Requests (INTIICAn).
Note STDn: bit1 of the IICA status register n (IICSn).
STTn: Bit1 of IICA control register n0 (IICCTLn0).
Figure 14-20 Example of arbitration timing
SCLAn
SDAAn
SCLAn
SDAAn
SCLAn
SDAAn
Note n=0
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