Cmsemicon CMS32L051 - Real-Time Clock Control Register0 (RTCC0)

V1.2.2
CMS32L051 User Manual |Chapter 7 Real-Time Clock
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7.3.3 Real-time clock control register0 (RTCC0)
This is an 8-bit register that sets the start or stop of operation of the real-time clock, control of the
RTC1HZ pin, 12/24-hour system, and fixed-cycle interrupt function.
The RTCC0 register is set via an 8-bit memory operation command. After the reset signal is generated, the
value of this register becomes 00H.
Figure 7-4 Format of real-time clock control register 0 (RTCC0)
Address: 0x40044F5D After reset: 00H R/W
symbol
RTCC0
RTCE
Operational control of real-time clock
0
Stop the operation of the counter.
1
Start the operation of the counter.
RCLOE1
Output control of RTC1HZ pin
0
Disable the output of the RTC1HZ pin (1Hz).
1
Enable the output of the RTC1HZ pin (1Hz).
AMPM
Selection of 12-hour system/24-hour system
0
12-hour system (for morning or afternoon).
1
24-hour system
 the value of the AMPM bit, the RWAIT bit (bit0 of the real-time clock control register 1
(RTCC1)) must be set to 1 and rewrite later. If you change the value of the AMPM bit, the value of the
hour count register (HOUR) becomes the corresponding value of the time system in which you set it.
-2.
CT2
CT1
CT0
Selection of fixed period interruption (INTRTC)
0
0
0
Do not use the fixed-cycle interrupt feature.
0
0
1
0.5 seconds once (synchronized with second accumulation).
0
1
0
Once every 1 second (at the same time as the second
accumulation).
0
1
1
Once every 1 minute (00 seconds per minute).
1
0
0
Once every 1 hour (00 minutes and 00 seconds per hour).
1
0
1
Once a day (00:00:00 every day).
1
1
×
Once every 1 month (1 of each month at 00:00:00 AM).
To change the value of the CT2~CT0 bits while the counter is running (RTCE=1), it must be overridden
after setting the INTRTC to disable interrupt handling through the interrupt mask flag register, and the RIFG
must be cleared after the override flags and RTCIF flags, and then set to allow interrupt handling.
Note 1 When the RCE bit is 1, the RCLOE1 bit cannot be changed.
2. When the RTCE bit is 0, even if the RCLOE1 set to 1 is not output 1Hz.
Remark ×: Ignore
7
6
5
4
3
2
1
0
RTCE
0
RCLOE1
Note
0
AMPM
CT2
CT1
CT0