CMS32L051 User Manual |Chapter 4 Clock Generation Circuit
www.mcu.com.cn 89 / 703
4.6.2 Example of setting up an X1 oscillation circuit
After the reset is released, the CPU/peripheral hardware clock (f
CLK
) must be running at a high-speed
internal oscillator clock. Thereafter, if the oscillation clock is changed to X1, the oscillation circuit is set and the
oscillation start control is controlled by the oscillation settling time selection register (OSTS), the clock operation
mode control register (CMC), and the clock running state control register (CSC). And wait for the oscillation to
stabilize through the status register (OSTC) of the oscillation settling time counter. After waiting for the oscillation
to stabilize, set the X1 oscillation clock to fCLK through the system clock control register (CKC).
[Register Setting] The registers must be set in order from (1) to (5).
(1) Put the OSCSEL position of the CMC register 1, when f
X
is greater than or equal to 10MHz, the
AMPH Position 1 to make the X1 oscillation circuit run.
7 6 5 4 3 2 1 0
Cmc
(2) The oscillation stabilization time of the X1 oscillation circuit when the deep sleep mode is released is
selected through the OSTS register.
Example) To wait at least 102 us through a 10MHz resonator, it must be set to the following values.
7 6 5 4 3 2 1 0
OSTS
(3) Clear the MSTOP bit of the CSC register to 0 so that the X1 oscillation circuit begins to oscillate.
7 6 5 4 3 2 1 0
CSC
(4) Wait through the OSC register for the oscillation of the X1 oscillation circuit to stabilize.
Example) To wait at least 102 us through a 10MHz resonator, you must wait until you change to the
following values.
7 6 5 4 3 2 1 0
OSTC
(5) Set the X1 oscillation clock to the CPU/peripheral hardware clock through the MCM0 bit of the CKC
register.
7 6 5 4 3 2 1 0
CKC
To Next Page
Loading...