Cmsemicon CMS32L051 - Serial Output Level Register M (Solm)

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CMS32L051 User Manual |Chapter 12 Universal Serial Communication Unit
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12.3.13 Serial output level register m (SOLm)
The SOLm register is a register that sets the inverting of the data output level of each channel.
This register can be set only in UART mode. In SSPI mode and Simplified I
2
C mode, the corresponding
bit must be set to "0". Only when serial output is allowed (SOEmn=1), the n-inverting setting of each channel
of this register is reflected to the pin output. When serial output is disabled (SOEmn=0), the value of the SOmn
bit is output directly. It is forbidden to override the SOLm register during operation (SEmn=1).
The SOLm register is set via a 16-bit memory operation command.
The low 8 bits of the SDOLm register can be set with SOLmL and via 8-bit memory operation instructions.
After the reset signal is generated, the value of the SOLm register changes to 0000H.
Figure 12-17 Format of serial output level register m (SOLm)
Address: 40041134H After reset: 0000HR/W
Symbol
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SOL0
Address: 40041574H After reset: 0000HR/W
Symbol
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SOL1
Grou
nd
mn
Selection of channel n transmit data level inversion in UART mode
0
The communication data is output directly.
1
Inverts the output of communication data.
Notice The bit15 to 3 and bit1 of the SOL0 register and the bit15 to 1 of the SOL1 register must be set to "0".
Remark m: unit number (m=0, 1) n: channel number (n=0, 2).
0
0
0
0
0
0
0
0
0
0
0
0
0
SOL
02
0
SOL
00
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
SOL
10