Cmsemicon CMS32L051 - Master Tramission and Reception

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CMS32L051 User Manual |Chapter 13 Serial Interface SPI
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13.4.1 Master tramission and reception
If bit 6 (TRMD) of the Serial Operating Mode Register (SPIM) is 1, data can be sent or received. When a
value is written to the send buffer register (SDRO), the send/receive begins.
（1） Procedure
Figure 13-6 Initial setup steps of the master send/receive
The beginning of the
initial setting i
Set the PER0 register
Set the register
Set the SPIM register
Set the port
End of initial setting
i
The general-purpose serial
unit is relieved of the reset
state and the clock supply
begins
Set the serial clock
Set the operating
mode
Set the port mode
register
End the initial setup
If data is sent to the SDRO
register settings,
communication begins