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Cmsemicon CMS32L051 - Oscillation Stabilization Time Selection Register (OSTS)

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V1.2.2
CMS32L051 User Manual |Chapter 4 Clock Generation Circuit
www.mcu.com.cn 71 / 703
4.3.5 Oscillation stabilization time selection register (OSTS)
This is the register that selects the oscillation settling time of the X1 clock.
If the X1 clock is oscillated, it automatically waits for the time the OSTS register is set after the X1
oscillation circuit runs (MSTOP=0).
If you switch the CPU clock from the high-speed internal oscillator clock or the subsystem clock to the X1
clock, or if the CPU clock is a high-speed internal oscillator clock and is decommissioned after transferring to
deep sleep mode while the X1 clock oscillates, the oscillation settling time must be confirmed by the oscillation
settling time counter's status register (OSTC).
The time set by the OSTS register can be confirmed through the OSTC register.
Set the OSTS registers via 8-bit memory operation instructions. After the reset signal is generated, the
value of this register changes to 07H.
Figure 4-6 Format of oscillation stabilization time selection register (OSTS)
Address: 40020403H After reset: 07H R/W
Symbol
7 6 5 4 3 2 1 0
OSTS
OSTS2
OSTS1
OSTS0
Selection of oscillation stabilization time
f
X
=10MHz
f
X
=20MHz
0
0
0
28/fX
25.6us
12.8us
0
0
1
29/fX
51.2us
25.6us
0
1
0
210/fX
102us
51.2us
0
1
1
211/fX
204us
102us
1
0
0
213/fX
819us
409us
1
0
1
215/fX
3.27ms
1.63ms
1
1
0
217/fX
13.1ms
6.55ms
1
1
1
218/fX
26.2ms
13.1ms
Note 1 To change the settings of the OSTS register, you must change it before placing the MSTOP position of the clock
running state control register (CSC) 0.
2. The oscillation settling time counter only counts during the oscillation stabilization time set by the OSTS register.
In the following cases, the oscillation settling time of the OSTS register must be set to be greater than the count
value confirmed by the OSTC register after the oscillation has begun.
-speed internal oscillator clock or a subsystem clock and oscillation of the X1
clock is to begin
-speed internal oscillator clock and deep sleep mode is removed after moving to
deep sleep mode in the state of X1 clock oscillation (so it must be noted that the OSTS register after deep sleep
mode is dismissed, only OSTS is set.) The state of the oscillation set by the register within the stable time).
3.The oscillation stabilization time of the X1 clock does not include the time before the clock starts oscillating
(Figure a below).
Deep sleep mode is released
X1 pin
Voltage waveform
a
Note f
X
: X1 clock oscillation frequency
0
0
0
0
0
OSTS2
OSTS1
OSTS0

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