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Cmsemicon CMS32L051 - 12-Bit A;D Conversion Result Register (ADCR)

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V1.2.2
CMS32L051 User Manual |Chapter 11 A/D Converter
www.mcu.com.cn 279 / 703
11.2.7 12-bit A/D conversion result register (ADCR)
This is a 16-bit register that holds the results of the A/D conversion, and this register is readable only.
Whenever the A/D conversion ends, the conversion result notes are loaded from the successive
approximation register (SAR).
The high 4 bits of this register are fixed to 0 when mode is selected, and ADM2.CHRDE=1 can be
configured as the channel number of this conversion result when scanning mode.
The ADCR register is read through 16-bit memory operation instructions.
After the reset signal is generated, the value of this register changes to 0000H.
Note If the value of the A/D conversion result is not within the set value of the A/D conversion result comparison function
(set by ADRCK bits and ADUL/ADLL registers (refer to Figure 11-7)), it is not saved A/D conversion result.
Figure11-10 Format of 12-bit A/D conversion result register (ADCR)
Reset value: 0000H R
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ADCR
ADCH3
ADCH2
ADCH1
ADCH0
ADCR[11:0]
Note: 1 If only 8-bit resolution A/D conversion results are required, the upper 8 bits of the conversion result can be read
through the ADCRH register.
2. When 16-bit access to the ADCR register, the high 12 bits of the conversion result can be read sequentially
from bit11.
)
The readout value of AD CH0~3 is fixed at 4'b0000
 CHRDE=1, ADCH0~3 readout value and conversion channel
relationship are as follows:
ADCH3
ADCH2
ADCH1
ADCH0
Transform the
channel identity
0
0
0
0
ANI0
0
0
0
1
ANI1
0
0
1
0
ANI2
0
0
1
1
ANI3
0
1
0
0
ANI4
0
1
0
1
ANI5
0
1
1
0
ANI6
0
1
1
1
ANI7
1
0
0
0
ANI8
1
0
0
1
ANI9
1
0
1
0
ANI10
1
0
1
1
ANI11
1
1
0
0
ANI12
1
1
0
1
ANI13
1
1
1
0
ANI14
1
1
1
1
ANI15

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