CMS32L051 User Manual |Chapter 12 Universal Serial Communication Unit
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12.3.15 Noise filter enable register 0 (NFEN0)
The NFEN0 register sets whether the noise filter is used for the input signal of the serial data input pins of
each channel.
For pins used for SSPI or simple I
2
C communication, the corresponding bit must be 0 to invalidate the
noise filter. For the pins used for UART communication, the corresponding bit must be set to "1" to make the
noise filter active.
When the noise filter is active, detect whether the two clocks are consistent after synchronization through
the running clock (f
MCK
) of the object channel; When the noise filter is invalid, synchronization is performed
only through the running clock (f
MCK
) of the object channel.
The NFEN0 register is set via an 8-bit memory operation command.
After the reset signal is generated, the value of the NFEN0 register changes to 00H.
Figure 12-20 Format of noise filter enable register 0 (NFEN0)
Address: 40040470H After reset: 00HR/W
Symbol
7 6 5 4 3 2 1
0
NFEN0
When used as the RxD2 pin, SNFEN20 must be set to "1".
When used as a function other than the RxD2 pin, the SNFEN20 must be set to "0".
When used as the RxD1 pin, SNFEN10 must be set to "1".
When used as a function other than the RxD1 pin, the SNFEN10 must be set to "0".
When used as the RxD0 pin, SNFEN00 must be set to "1".
When used as a function other than the RxD0 pin, the SNFEN00 must be set to "0".
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