Cmsemicon CMS32L051 - Master Reception

V1.2.2
CMS32L051 User Manual |Chapter 13 Serial Interface SPI
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13.4.2 Master reception
If Bit 6 (TRMD) of the Serial Operating Mode Register (SPIM) is 0, only data can be received. Receive
begins when data is read from the receive buffer register (SDRI).
（1） Procedure
Figure 13-10 The initial setup step of the master reception
The beginning of
the initial setting i
Set the PER0 register
Set the register
Set the SPIM register
Set the port
End of initial setting i
The general-purpose serial
unit is relieved of the reset
state and the clock supply
begins
Set the serial clock
Set the operating
mode
Set the port mode
register
End the initial setup
If data is read from the SDRI
registers, communication
begins