Cmsemicon CMS32L051 - Page 471

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CMS32L051 User Manual |Chapter 13 Serial Interface SPI
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Figures 13-11 Stop step of master receive
Abort the start of
the setting i
Abort the end of
the setting
SPTF=0?
No
Yes
Set the PER0 register
If there is data being
transferred, wait for the
transfer to end
Put the SPIE position "0" to
stop the SPI from running
To use deep sleep mode, stop
the clock of the SPI unit and
set the reset state
The penultimate (n-1)
reads out the data
Note 1
Write the SPIM
register
Note 1: In receive-only mode, the SPI transmission is triggered by reading the value of
the SDRI register. If SPI is not aborted in time, there may be a redundant transmission
after the last reading of the SDRI.
If you want to avoid the last redundant transmission, you can turn off SPIES after
reading out the data for the second time to the penultimate and wait for one SCK cycle.
The transfer of SPI will be aborted after the last data transfer is completed.