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CMS32L051 User Manual |Chapter 5 Universal Timer Unit (Timer4)
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Figure 5-48 Opeation procedure for external event counter function
Software operation
Hardware status
Timer4 Initial
Settings
The input clock of the timer unit m is in a state
where supply is stopped.
(stop providing clock, cannot write registers)
Set the TM4mEN bit of the peripheral enable register 0
(PER0) to 1.
The input clock of the timer unit m is in a
supplied state, and each channel is in an
operation stop state.
(Start providing clock capable of writing
registers)
A clock selection register m (TPSm) that sets the timer.
Determine the clock frequency for CKm0 to CKm3.
channel
initial setting
Allow the noise filter to correspond to register 1
(NFEN12) either OFF or 1 (ON).
A timer mode register mn (TMRmn) is set.
A timer data register mn (TDRmn) is set with a count
value.
Output timer to allow TOEmn location 0 for register m
(TOEm).
The channel is in an operational stop state.
(Provide clocks, consume a portion of the
Power)
Start Run
Set TSmn to 1.
The TSmn bit is a trigger bit and is automatically returned
to 0.
The TEmn bit becomes 1 and starts counting.
The value of the TDRmn register is loaded into
the timer count register mn (TCRmn) and
enters the detection waiting state of the TImn
pin input edge.
Running
You can change the settings of the TDRmn register at
will.
Can read TCRmn register at any time.
The TSRmn register is not used.
Prevents the setting of TMRmn registers, TOMmn bits,
TOLmn bits, TOmn bits, and TOEmn bits from being
changed.
The counter (TCRmn) counts down each time
an input edge of the TImn pin is detected, and
if the count reaches '0 000H', loads the value
of the TDRmn register again into the TCRmn
register and continues counting. A INTTMmn
is generated when TCRmn is detected as
'0000H'.
This run is repeated thereafter.
Stop
Running
Set TTmn to 1.
The TTmn bit is a trigger bit and is automatically returned
to 0.
The TEmn bit changes to 0 and stops
counting.
The TCRmn register maintains count values
and stops counting.
Timer4 Stop
Set the TM4 mEN of the PER0 register to 0.
The input clock of the timer unit m is in a
stopped supply state.
Initialize the SFRs of all circuits and channels.
Restart Operation