Cmsemicon CMS32L051 - Page 266

V1.2.2
CMS32L051 User Manual |Chapter 11 A/D Converter
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Figure11-1 Block diagram of A/D converter
Internal
Bus
PMCxx
port mode control register
ANI1/P21
ANI0/P20
ANI2/P22
ANI3/P23
ANI4/P24
ANI5/P25
ANI6/P26
ANI7/P27

selector
temperature
sensor
internal reference
voltage (1.45V)
analog input
channel control
register (ADS)
ADS4
ADS3
ADS2
ADS1
ADS0
7
sample & hold
circuit
compare
voltage
generati
on circuit
selector
VDD
VSS
successive
approximation register
(SAR)
control
circuit
conversion result
comparision upper limit
configure register (ADUL)
conversion result
comparision lower limit
configure register (ADLL)
ADMD
ADSCM
ADCS
FR2
FR1
FR0
ADCE
ADREFP0
ADRCK
A/D conversion
result
upper
limit/lower limit
comparision
circuit
A/D conversion result
register
(ADCR, ADCRH)
ADREFP1,ADREFP0
位
A/D mode
register
2(ADM2)
INTAD
a
2
5
8
8
Timer trigger signal
(INTTM01)
EVENTC selected Event signal
Timer trigger signal
(INTRTC)
Timer trigger signal
(INTIT)
A/D mode register
1 (ADM1)
A/D mode register
0(ADM0)
Internal
Bus
ANI36/P136
digital port control
ADS5
ADISS
internal reference voltage
(1.45V)
ADREFP1
ADTMD1
ADTMD0
ADTRS1
ADTRS0
A/D trigger mode
register (ADTRG)
4
Note: Please refer to 0 for the selection of analog input channel ANIx