Cmsemicon CMS32L051 - Page 98

V1.2.2
CMS32L051 User Manual |Chapter 4 Clock Generation Circuit
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Table 4-4 Transfers of CPU clocks (2/2)
CPU clock
Conditions before transfer
Post-transfer processing
Before
transferring
After
transferring
XT1 clock
High-speed
internal
oscillator
The high-speed internal oscillator is
oscillating and the high-speed internal is
chosen
Can stop the oscillation of XT1
(XTSTOP=1).
clock
The oscillator clock acts as the master
system clock.
 HIOSTOP=0, MCS=0
X1 clock
The X1 oscillation is stable and the high-
speed system clock is chosen as the main
system
Unified clock.
 OSCSEL=1, EXCLK=0, MSTOP=0
After the oscillation stabilization time
 MCS=1
External master
system clock
Leave the external clock of the EXCLK pin
input active and select the high-speed
system clock as the master system clock.
 OSCSEL=1, EXCLK=1, MSTOP=0
 MCS=1
External
subsystem clock
Cannot be transferred.

External
subsystem clock
High-speed
internal
oscillator
The high-speed internal oscillator is
oscillating and the high-speed internal is
chosen
Input to the external subsystem clock
can be set to invalid
clock
The oscillator clock acts as the master
system clock.
(XTSTOP=1).
 HIOSTOP=0, MCS=0
X1 clock
The X1 oscillation is stable and the high-
speed system clock is chosen as the main
system
Unified clock.
 OSCSEL=1, EXCLK=0, MSTOP=0
oscillation stabilization time
 MCS=1
External master
system clock
Leave the external clock of the EXCLK pin
input active and select the high-speed
system clock as the master system clock.
 OSCSEL=1, EXCLK=1, MSTOP=0
 MCS=1
XT1 clock
Cannot be transferred.
