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ST STM32WL5 Series User Manual

ST STM32WL5 Series
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Debug support (DBG) RM0453
1420/1461 RM0453 Rev 1
38.12 Microcontroller debug unit (DBGMCU)
DBGMCU is a component containing a number of registers that control the power and clock
behavior in debug mode. It allows the debugger (or the debug software) to perform the
following tasks:
Maintain the clock and power to the processor cores when in low-power modes (Sleep,
Stop or Standby).
Maintain the clock and power to the system debug and trace components when in
low-power modes.
Stop the clock to certain peripherals (such as watchdogs, timers, RTC) when either
processor core is stopped in debug mode.
DBGMCU registers are not reset by a system reset, only by a power on reset. They are
accessible to the debugger via the CPU1 AHB access port at base address 0xE0042000.
Note: DBGMCU is not a standard CoreSight component, consequently it does not appear in the
CPU1 ROM table.
38.12.1 DBGMCU identity code register (DBGMCU_IDCODER)
Address offset: 0x000
Reset value: 0xXXXX 6497
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
REV_ID[15:0]
rrrrrr r r r r rrrrrr
1514131211109876543210
Res. Res. Res. Res. DEV_ID[11:0]
rrrrrrrrrrrr
Bits 31:16 REV_ID[15:0]: revision
For values, refer to the device errata sheet.
Bits 15:12 Reserved, must be kept at reset value.
Bits 11:0 DEV_ID[11:0]: device ID
0x497: STM32WL5x

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ST STM32WL5 Series Specifications

General IconGeneral
BrandST
ModelSTM32WL5 Series
CategoryMicrocontrollers
LanguageEnglish

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