RM0453 Rev 1 749/1461
RM0453 Advanced-control timer (TIM1)
829
Figure 152. TI2 external clock connection example
1. Codes ranging from 01000 to 11111 are reserved
For example, to configure the upcounter to count in response to a rising edge on the TI2
input, use the following procedure:
1. Select the proper TI2x source (internal or external) with the TI2SEL[3:0] bits in the
TIMx_TISEL register.
2. Configure channel 2 to detect rising edges on the TI2 input by writing CC2S = ‘01’ in
the TIMx_CCMR1 register.
3. Configure the input filter duration by writing the IC2F[3:0] bits in the TIMx_CCMR1
register (if no filter is needed, keep IC2F=0000).
4. Select rising edge polarity by writing CC2P=0 and CC2NP=0 in the TIMx_CCER
register.
5. Configure the timer in external clock mode 1 by writing SMS=111 in the TIMx_SMCR
register.
6. Select TI2 as the trigger input source by writing TS=00110 in the TIMx_SMCR register.
7. Enable the counter by writing CEN=1 in the TIMx_CR1 register.
Note: The capture prescaler is not used for triggering, so the user does not need to configure it.
When a rising edge occurs on TI2, the counter counts once and the TIF flag is set.
The delay between the rising edge on TI2 and the actual clock of the counter is due to the
resynchronization circuit on TI2 input.
MSv40117V1
External clock
mode 1
Internal clock
mode
CK_PSC
TIMx_SMCR
SMS[2:0]
ITRx
TI1_ED
TI1FP1
TI2FP2
TIMx_SMCR
TS[4:0]
TI2[0]
0
1
TIMx_CCER
CC2P
TIMx_CCMR1
Edge
detector
TI2F_Rising
TI2F_Falling
00110
000xx
00100
00101
Filter
ICF[3:0]
(internal clock)
Encoder
mode
ETRF
00111
External clock
mode 2
ECE
TI2[1..15]
TI2
TRGI
ETRF
CK_INT
TI1F or
TI2F or
or
TIMx_CH2
(1)
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