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ST STM32WL5 Series User Manual

ST STM32WL5 Series
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Debug support (DBG) RM0453
1410/1461 RM0453 Rev 1
38.11.5 TPIU formatter and flush status register (TPIU_FFSR)
Address offset: 0x300
Reset value: 0x0000 0008
38.11.6 TPIU formatter and flush control register (TPIU_FFCR)
Address offset: 0x304
Reset value: 0x0000 0102
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
FTNON
STOP
TCPRE
SENT
FTSTO
PPED
FLINPR
OG
rrrr
Bits 31:4 Reserved, must be kept at reset value.
Bit 3 FTNONSTOP: indicates whether formatter can be stopped or not
1: Formatter cannot be stopped.
Bit 2 TCPRESENT: indicates whether the optional TRACECTL output pin is available for use
0: TRACECTL pin is not present in this device.
Bit 1 FTSTOPPED: stop request signal received
The formatter received a stop request signal and all trace data and post-amble is sent. Any
additional trace data on the ATB interface is ignored.
0: Formatter not stopped
1: Formatter stopped
Bit 0 FLINPROG: flush in progress
This bit indicates whether a flush on the ATB slave port is in progress and reflects the status
of the AFVALIDS output. A flush can be initiated by the flush control bits in the TPIU_FFCR
register.
0: No flush in progress
1: Flush in progress
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. TRIGIN Res. Res. Res. Res. Res. Res.
ENFCO
NT
Res.
rrw

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ST STM32WL5 Series Specifications

General IconGeneral
BrandST
ModelSTM32WL5 Series
CategoryMicrocontrollers
LanguageEnglish

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