General-purpose I/Os (GPIO) RM0453
402/1461 RM0453 Rev 1
10.3.15 Using PH3 as GPIO
PH3 may be used as boot pin (BOOT0) or as GPIO.
PH3 switches from the input mode to the analog input mode depending on the nSWBOOT0
bit in the user option byte as follows:
• After the option byte loading phase if nSWBOOT0 = 1.
• After reset if nSWBOOT0 = 0.
10.4 GPIO registers
This section gives a detailed description of the GPIO registers for GPIOx port,
with x = A to C and x = H.
For a summary of register bits, register address offsets and reset values, refer to Table 71 to
Table 74.
The peripheral registers can be written in word, half word or byte mode.
10.4.1 GPIOx mode register (GPIOx_MODER) (x = A to B)
Address offset: Block A: 0x0000
Address offset: Block B: 0x0400
Reset value: Block A: 0xABFF FFFF
Reset value: Block B: 0xFFFF FEBF
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
MODE15[1:0] MODE14[1:0] MODE13[1:0] MODE12[1:0] MODE11[1:0] MODE10[1:0] MODE9[1:0] MODE8[1:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
MODE7[1:0] MODE6[1:0] MODE5[1:0] MODE4[1:0] MODE3[1:0] MODE2[1:0] MODE1[1:0] MODE0[1:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:30 MODE15[1:0]: Port Px15 IO type configuration
Bits 29:28 MODE14[1:0]: Port Px14 IO type configuration
Bits 27:26 MODE13[1:0]: Port Px13 IO type configuration
Bits 25:24 MODE12[1:0]: Port Px12 IO type configuration
Bits 23:22 MODE11[1:0]: Port Px11 IO type configuration
Bits 21:20 MODE10[1:0]: Port Px10 IO type configuration
Bits 19:18 MODE9[1:0]: Port Px9 IO type configuration
Bits 17:16 MODE8[1:0]: Port Px8 IO type configuration
Bits 15:14 MODE7[1:0]: Port Px7 IO type configuration
Bits 13:12 MODE6[1:0]: Port Px6 IO type configuration
Bits 11:10 MODE5[1:0]: Port Px5 IO type configuration
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