RM0453 Rev 1 419/1461
RM0453 General-purpose I/Os (GPIO)
427
10.4.25 GPIOH output speed register (GPIOH_OSPEEDR)
Address offset: 0x1C08
Reset value: 0x0000 0000
10.4.26 GPIOH pull-up/pull-down register (GPIOH_PUPDR)
Address offset: 0x1C0C
Reset value: 0x0000 0000
Bits 31:4 Reserved, must be kept at reset value.
Bit 3 OT3: Port PH3 output type configuration
These bits are written by software to configure the I/O output type.
0: Output push-pull (reset state)
1: Output open-drain
Bits 2:0 Reserved, must be kept at reset value.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Res. Res. Res. Res. Res. Res. Res. Res. OSPEED3[1:0] Res. Res. Res. Res. Res. Res.
rw rw
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:6 OSPEED3[1:0]: Port PH3 output speed configuration
These bits are written by software to configure the I/O output speed.
00: Low speed
01: Medium speed
10: Fast speed
11: High speed
Note: Refer to the device datasheet for the frequency specifications and the power supply
and load conditions for each speed.
Bits 5:0 Reserved, must be kept at reset value.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. PUPD3[1:0] Res. Res. Res. Res. Res. Res.
rw rw
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