RM0453 Rev 1 405/1461
RM0453 General-purpose I/Os (GPIO)
427
10.4.5 GPIOx input data register (GPIOx_IDR) (x = A to B)
Address offset: Block A: 0x0010
Address offset: Block B: 0x0410
Reset value: 0x0000 XXXX
Bits 23:22 PUPD11[1:0]: Port Px11 pull configuration
Bits 21:20 PUPD10[1:0]: Port Px10 pull configuration
Bits 19:18 PUPD9[1:0]: Port Px9 pull configuration
Bits 17:16 PUPD8[1:0]: Port Px8 pull configuration
Bits 15:14 PUPD7[1:0]: Port Px7 pull configuration
Bits 13:12 PUPD6[1:0]: Port Px6 pull configuration
Bits 11:10 PUPD5[1:0]: Port Px5 pull configuration
Bits 9:8 PUPD4[1:0]: Port Px4 pull configuration
Bits 7:6 PUPD3[1:0]: Port Px3 pull configuration
Bits 5:4 PUPD2[1:0]: Port Px2 pull configuration
Bits 3:2 PUPD1[1:0]: Port Px1 pull configuration
Bits 1:0 PUPD0[1:0]: Port Px0 pull configuration
These bits are written by software to configure the I/O pull-up or pull-down
00: No pull-up, pull-down
01: Pull-up
10: Pull-down
11: Reserved
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
ID15 ID14 ID13 ID12 ID11 ID10 ID9 ID8 ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0
rrrrrr r r r r rrrrrr
Bits 31:16 Reserved, must be kept at reset value.
Bits 15:0 ID[15:0]: Port Px[15:0] input data bit
These bits are read-only. They contain the input value of the corresponding I/O port.