RM0453 Rev 1 243/1461
RM0453 Power control (PWR)
276
6.5.5 Sleep mode
I/O states in Sleep mode
In Sleep mode, all I/O pins keep the same state as in Run mode.
Enter Sleep mode
The Sleep mode is entered from Run mode according to Enter low-power mode, when the
SLEEPDEEP bit in the CPU system control register is cleared (see Table 49).
Exit Sleep mode
The MCU exits the Sleep mode (see Table 49) as indicated in Exit low-power mode.
Table 48. CPU wakeup versus system operating mode
System
mode
CPU1 CPU2
CPU1 wakeup CPU2 wakeup
C1SBF
C1STOPxF
C2SBF
C2STOPxF
Run
0 0 0 0 Wakeup from Run Wakeup from Run
0100
Wakeup from Stop, but system is
already in Run due to CPU2
Wakeup from Run
0001Wakeup from Run
Wakeup from Stop, but system is
already in Run due to CPU1
1000
Wakeup from Standby, but system is
already in Run due to CPU2
Wakeup from Run
0010Wakeup from Run
Wakeup from Standby, but system is
already in Run due to CPU1.
1100
Wakeup from Standby followed by Stop,
but system is already in Run due to
CPU2
Wakeup from Run
0011Wakeup from Run
Wakeup from Standby followed by Stop,
but system is already in Run due to
CPU1
Stop
(1)
0 1 0 1 Wakeup from Stop (CPU2 still in CStop) Wakeup from Stop (CPU1 still in CStop)
1101
Wakeup from Stop after the system has
been in Standby (CPU2 still in CStop)
Wakeup from Stop (CPU1 still in CStop)
0 1 1 1 Wakeup from Stop (CPU2 still in CStop)
Wakeup from Stop after the system
having been in Standby (CPU1 still in
CStop).
Standby 1 0 1 0
Wakeup from Standby (CPU2 still in
CStop)
Wakeup from Standby (CPU1 still in
CStop)
N/A Others Not valid, does not occur
1. Wakeup from Stop 0 and 1 or Stop 2 mode can be detected by the corresponding CnSTOPF and CnSTOP2F.
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