ST STM32WL5 Series User Manual

RM0453 Rev 1 1361/1461
RM0453 Debug support (DBG)
1448
38.6.19 DWT CoreSight component identity register 2 (DWT_CIDR2)
Address offset: 0xFF8
Reset value: 0x0000 0005
38.6.20 DWT CoreSight component identity register 3 (DWT_CIDR3)
Address offset: 0xFFC
Reset value: 0x0000 00B1
38.6.21 DWT register map and reset values
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. PREAMBLE[19:12]
rrrrrrrr
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 PREAMBLE[19:12]: component ID bits [23:16]
0x05: Common ID value
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
1514131211109876543210
Res. Res. Res. Res. Res. Res. Res. Res. PREAMBLE[27:20]
rrrrrrrr
Bits 31:8 Reserved, must be kept at reset value.
Bits 7:0 PREAMBLE[27:20]: component ID bits [31:24]
0xB1: Common ID value
Table 271. DWT register map and reset values
Offset Register name
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12
11
10
9 8 7 6 5 4 3 2 1 0
0x000
DWT_CTRLR
NUMCOMP
[3:0]
NOTRCPKT
NOEXTTRIG
NOCYCCNT
NOPRFCNT
Res.
CYCEVTENA
FOLDEVTENA
LSUEVTENA
SLEEPEVTENA
EXCEVTENA
CPIEVTENA
EXCTRCENA
Res. Res. Res.
PCSAMPLENA
SYNCTAP[1:0]
CYCTAP
POSINIT[3:0]
POSTPRESET[3:0]
CYCCNTENA
Reset value 01000000 0000000 0000000000000
0x004
DWT_CYCCNTR CYCCNT[31:0]
Reset value 00000000000000000000000000000000

ST STM32WL5 Series Specifications

General

Brand	ST
Model	STM32WL5 Series
Category	Microcontrollers
Language	English