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ST STM32WL5 Series

ST STM32WL5 Series
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RM0453 Rev 1 211/1461
RM0453 Sub-GHz radio (SUBGHZ)
218
5.10.11 Sub-GHz radio generic synchronization word control register 4
(SUBGHZ_GSYNCR4)
Address offset: 0x06C3
Reset value: 0x25
5.10.12 Sub-GHz radio generic synchronization word control register 3
(SUBGHZ_GSYNCR3)
Address offset: 0x06C4
Reset value: 0x56
5.10.13 Sub-GHz radio generic synchronization word control register 2
(SUBGHZ_GSYNCR2)
Address offset: 0x06C5
Reset value: 0x53
5.10.14 Sub-GHz radio generic synchronization word control register 1
(SUBGHZ_GSYNCR1)
Address offset: 0x06C6
Reset value: 0x65
Bits 7:0 SYNCWORD[47:40]: Sixth byte of generic packet synchronization word
76543210
SYNCWORD[39:32]
rw rw rw rw rw rw rw rw
Bits 7:0 SYNCWORD[39:32]: Fifth byte of generic packet synchronization word
76543210
SYNCWORD[31:24]
rw rw rw rw rw rw rw rw
Bits 7:0 SYNCWORD[31:24] Fourth byte of generic packet synchronization word
76543210
SYNCWORD[23:16]
rw rw rw rw rw rw rw rw
Bits 7:0 SYNCWORD[23:16]: Third byte of generic packet synchronization word
76543210
SYNCWORD[15:8]
rw rw rw rw rw rw rw rw

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