ST STM32WL5 Series User Manual

Hardware semaphore (HSEM) RM0453
372/1461 RM0453 Rev 1
8.4 HSEM registers
Registers must be accessed using word format. Byte and half-word accesses are ignored
and have no effect on the semaphores. Byte and half-word read accesses always return 0.
Byte and half-word accesses do not generate a bus error.
8.4.1 HSEM register semaphore x (HSEM_Rx)
Address offset: 0x000 + 0x4 * x (x = 0 to 15)
Reset value: 0x0000 0000
The HSEM_Rx must be used to perform a 2-step write lock, read back, and for unlocking a
semaphore. Only write accesses with authorized AHB bus master IDs are granted. Write
accesses with unauthorized AHB bus master IDs are discarded.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
LOCK Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res. Res.
rw
1514131211109876543210
Res. Res. Res. Res. COREID[3:0] PROCID[7:0]
rw rw rw rw rw rw rw rw rw rw rw rw
Bit 31 LOCK: Lock indication
This bit can be written and read by software.
0: On write free semaphore (only when COREID and PROCID match), on read semaphore
is free.
1: On write try to lock semaphore, on read semaphore is locked.
Bits 30:13 Reserved, must be kept at reset value.
Bit 12 Reserved, must be kept at reset value.
Bits 11:8 COREID[3:0]: Semaphore COREID
Written by software
- When the semaphore is free and the LOCK bit is at the same time written to 1 and the
COREID matches the AHB bus master ID.
- When the semaphore is unlocked (LOCK written to 0 and AHB bus master ID matched
COREID, the COREID is cleared to 0.
- When the semaphore is unlocked (LOCK bit written to 0 or AHB bus master ID does not
match COREID, the COREID is not affected.
- Write when LOCK bit is already 1 (semaphore locked), the COREID is not affected.
- An authorized read returns the stored COREID value.
Bits 7:0 PROCID[7:0]: Semaphore PROCID
Written by software,
-When the semaphore is free and the LOCK is written to 1, and the COREID matches the
AHB bus master ID , PROCID is set to the written data.
- When the semaphore is unlocked, LOCK written to 0 and AHB bus master ID matched
COREID, the PROCID is cleared to 0.
- When the semaphore is unlocked, LOCK bit written to 0 and AHB bus master ID does not
match COREID, the PROCID is not affected.
- Write when LOCK bit is already 1 (semaphore locked), the PROCID is not affected.
- An authorized read returns the stored PROCID value.

ST STM32WL5 Series Specifications

General

Brand	ST
Model	STM32WL5 Series
Category	Microcontrollers
Language	English