General-purpose timers (TIM16/TIM17) RM0453
914/1461 RM0453 Rev 1
Figure 250. Capture/compare channel (example: channel 1 input stage)
The output stage generates an intermediate waveform which is then used for reference:
OCxRef (active high). The polarity acts at the end of the chain.
Figure 251. Capture/compare channel 1 main circuit
MSv40936V1
0
1
Divider
/1, /2, /4, /8
ICPS[1:0]
TI1F_ED
To the slave mode controller
TI1FP1
11
01
CC1S[1:0]
IC1
TI2FP1
TRC
(from slave mode
controller)
10
IC1PS
0
1
TIMx_CCER
CC1P
TIMx_CCMR1
TI1F_Rising
TI1F_Falling
ICF[3:0]
Edge
detector
TIMx_CCMR1
TIMx_CCER
TI2F_Rising
(from channel 2)
TI2F_Falling
(from channel 2)
CC1E
f
DTS
Filter
downcounter
TI1[1..15]
TI1[0]
MSv63030V1
CC1E
compare shadow register
Comparator
Capture/compare preload register
Counter
IC1PS
CC1S[0]
CC1S[1]
Capture
Input mode
CC1S[0]
CC1S[1]
Output mode
UEV
OC1PE
(from time
base unit)
Compare
transfer
APB Bus
16/32-bit
MCU-peripheral interface
TIMx_CCMR1
OC1PE
CNT>CCR1
CNT=CCR1
TIMx_EGR
CC1G
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