ST STM32WL5 Series - Sub-Ghz Radio Generic Synchronization Word Control Register 0; (Subghz_Gsyncr0); Sub-Ghz Radio Lora Synchronization Word MSB Register; (Subghz_Lsyncrh)

Sub-GHz radio (SUBGHZ) RM0453
212/1461 RM0453 Rev 1
5.10.15 Sub-GHz radio generic synchronization word control register 0
(SUBGHZ_GSYNCR0)
Address offset: 0x06C7
Reset value: 0x64
5.10.16 Sub-GHz radio LoRa synchronization word MSB register
(SUBGHZ_LSYNCRH)
Address offset: 0x0740
Reset value: 0x14
5.10.17 Sub-GHz radio LoRa synchronization word LSB register
(SUBGHZ_LSYNCRL)
Address offset: 0x0741
Reset value: 0x24
Bits 7:0 SYNCWORD[15:8]: Second byte of generic packet synchronization word
76543210
SYNCWORD[7:0]
rw rw rw rw rw rw rw rw
Bits 7:0 SYNCWORD[7:0]: First byte of generic packet synchronization word
76543210
SYNCWORD[15:8]
rw rw rw rw rw rw rw rw
Bits 7:0 SYNCWORD[15:8]: LoRa synchronization word MSB bits [15:8]
0x14: LoRa private network
0x34: LoRa public network
Others: reserved
76543210
SYNCWORD[7:0]
rw rw rw rw rw rw rw rw
Bits 7:0 SYNCWORD[7:0]: LoRa synchronization word LSB bits [7:0]
0x24: LoRa private network
0x44: LoRa public network
Others: reserved