True random number generator (RNG) RM0453
648/1461 RM0453 Rev 1
22.7.3 RNG data register (RNG_DR)
Address offset: 0x008
Reset value: 0x0000 0000
The RNG_DR register is a read-only register that delivers a 32-bit random value when read.
The content of this register is valid when DRDY=1 and value is not 0x0, even if RNGEN=0.
22.7.4 RNG health test control register (RNG_HTCR)
Address offset: 0x010
Reset value: 0x0000 5A4E
Writing in RNG_HTCR is taken into account only if CONDRST bit is set, and CONFIGLOCK
bit is cleared in RNG_CR. Writing to this register is ignored if CONFIGLOCK=1.
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RNDATA[31:16]
rrrrrrrrrrrrrrrr
1514131211109876543210
RNDATA[15:0]
rrrrrrrrrrrrrrrr
Bits 31:0 RNDATA[31:0]: Random data
32-bit random data which are valid when DRDY=1. When DRDY=0 RNDATA value is zero.
It is recommended to always verify that RNG_DR is different from zero. Because when it is
the case a seed error occurred between RNG_SR polling and RND_DR output reading
(rare event).
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
HTCFG[31:16]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109876543210
HTCFG[15:0]
rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:0 HTCFG[31:0]: health test configuration
This configuration is used by RNG to configure the health tests. See Section 22.6: RNG
entropy source validation for the recommended value.
Note: The RNG behavior, including the read to this register, is not guaranteed if a different
value from the recommended value is written.
When reading or writing this register magic number; 0x17590ABC must be written
immediately before to RNG_HTCR register.