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ST STM32WL5 Series User Manual

ST STM32WL5 Series
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Embedded Flash memory (FLASH) RM0453
122/1461 RM0453 Rev 1
When option bit PCROP_RDP is cleared and when the RDP is changing from level 1 to
level 0, the full mass erase is replaced by a partial mass erase to preserve the PCROP area
(refer to Change the readout protection level). In this case, PCROP1x_STRT and
PCROP1x_END (x =A or B) are not erased.
Note: It is recommended to align PCROP areas with the page granularity when using
PCROP_RDP, or to leave free the rest of the page where PCROP zones starts or ends.
4.6.3 Write protection (WRP)
The user area in the Flash memory can be protected against unwanted write operations.
Two write-protected (WRP) areas can be defined, with 2-Kbyte granularity page. Each area
is defined by a start page offset and an end page offset related to the physical Flash
memory base address. These offsets are defined in the WRP address registers
FLASH_WRP1AR and FLASH_WRP1BR.
The WRP “x” area (x=A, B) is defined from the address:
Flash memory Base address + [WRP1x_STRT x 0x800] (included) to the address:
Flash memory Base address + [(WRP1x_END+1) x 0x800] (excluded).
The minimum WRP area size is one WRP 2_Kbyte page, WRP1x_END = WRP1x_STRT.
For example, to protect by WRP from the address 0x0801 2000 (included) to the address
0x0801 9FFF (included), if boot in Flash is selected, FLASH_WRP1AR register must be
programmed with:
WRP1A_STRT = 0x24
WRP1A_END = 0x33
WRP1B_STRT and WRP1B_END in FLASH_WRP1BR can be used instead (area “B” in
Flash memory).
When WRP is active, it cannot be erased or programmed. Consequently, a software mass
erase cannot be performed if one area is write-protected.
If an erase/program operation to a write-protected part of the Flash memory is attempted,
the write protection error flag (WRPERR) is set in FLASH_SR. This flag is also set for any
write access to on the following area:
OTP area
part of the Flash memory that can never be written like the ICP
PCROP area
Note: When the Flash memory readout protection level is selected (RDP level1), it is not possible
to program or erase the memory if the CPU debug features are connected (JTAG or single
wire) or boot code is being executed from RAM or system Flash, even if WRP is not
activated. Any attempt generates an hard fault (BusFault).
Table 21: PCROP protection
PCROP registers values (x = A or B) PCROP protection area
PCROP1x_STRT = PCROP1x_END No PCROP1x, unprotected
PCROP1x_STRT > PCROP1x_END No PCROP1x, unprotected
PCROP1x_STRT < PCROP1x_END Pages from PCROP1x_STRT to PCROP1x_END are protected

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ST STM32WL5 Series Specifications

General IconGeneral
BrandST
ModelSTM32WL5 Series
CategoryMicrocontrollers
LanguageEnglish

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