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Real-time clock (RTC) RM0453

1034/1461 RM0453 Rev 1

32.6.17 RTC alarm B sub second register (RTC_ALRMBSSR)

This register can be written only when ALRBE is reset in RTC_CR register, or in initialization

mode.

Address offset: 0x4C

Backup domain reset value: 0x0000 0000

System reset: not affected

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

SSCLR Res. MASKSS[5:4] MASKSS[3:0] Res. Res. Res. Res. Res. Res. Res. Res.

rw rw rw rw rw rw rw

1514131211109876543210

Res. SS[14:0]

rw rw rw rw rw rw rw rw rw rw rw rw w rw rw

Bit 31 SSCLR: Clear synchronous counter on alarm (Binary mode only)

0: The synchronous binary counter (SS[31:0] in RTC_SSR) is free-running.

1: The synchronous binary counter (SS[31:0] in RTC_SSR) is running from 0xFFFF FFFF to

RTC_ALRMBBINR → SS[31:0] value and is automatically reloaded with 0xFFFF FFFF when

reaching RTC_ALRMBBINR → SS[31:0].

Note: SSCLR must be kept to 0 when BCD or mixed mode is used (BIN = 00, 10 or 11).

Bit 30 Reserved, must be kept at reset value.

Bits 29:24 MASKSS[5:0]: Mask the most-significant bits starting at this bit

0: No comparison on sub seconds for Alarm B. The alarm is set when the seconds unit is

incremented (assuming that the rest of the fields match).

1: SS[31:1] are don’t care in Alarm B comparison. Only SS[0] is compared.

2: SS[31:2] are don’t care in Alarm B comparison. Only SS[1:0] are compared.

...

31: SS[31] is don’t care in Alarm B comparison. Only SS[30:0] are compared.

From 32 to 63: All 32 SS bits are compared and must match to activate alarm.

Note: In BCD mode (BIN=00)The overflow bits of the synchronous counter (bits 15) is never

compared. This bit can be different from 0 only after a shift operation.

Bits 23:15 Reserved, must be kept at reset value.

Bits 14:0 SS[14:0]: Sub seconds value

This value is compared with the contents of the synchronous prescaler counter to determine

if alarm B is to be activated. Only bits 0 up to MASKSS-1 are compared.

This field is the mirror of SS[14:0] in the RTC_ALRMBBINR, and so can also be read or

written through RTC_ALRMBBINR.

ST STM32WL5 Series User Manual

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