ST STM32WL5 Series User Manual

Power control (PWR) RM0453
228/1461 RM0453 Rev 1
The independent supply V
DDA
is not considered as present by default and a logical and
electrical isolation is applied to ignore any information coming from the peripherals supplied
by these dedicated supplies:
• If V
DDA
is shorted externally to V
DD
, the application must assume that V
DDA
is available
without enabling any peripheral voltage monitoring.
• If V
DDA
is independent from V
DD
, the peripheral voltage monitoring (PVM) can be
enabled to confirm whether the V
DDA
supply is present or not.
The following sequence must be applied before using any of these analog peripherals:
ADC, DAC, comparators or voltage reference buffer:
1. If V
DDA
is independent from V
DD
:
a) Enable PVM3 by setting PVME3 bit in the PWR control register 2 (PWR_CR2).
b) Wait for the PVM3 wakeup time.
c) Wait until PVMO3 is cleared in the Power status register 2 (PWR_SR2).
d) Disable the PVM3 for consumption saving (optional).
2. Enable the analog peripheral. This automatically removes the V
DDA
isolation.
6.2.4 Radio end of life (EOL)
The radio end-of-life monitor provides information on the V
DD
supply when it is too low to
operate the sub-GHz radio. When reaching the EOL level, the software must stop all radio
activity in a safe way.
The EOL is enabled by setting the RFEOLEN bit.
A RFEOLF flag is available in Power status register 2 (PWR_SR2) to indicate if V
DD
voltage
level is below the EOL threshold.
The EOL is only generated when the sub-GHz radio is in Calibrate, Standby or Active mode.
Figure 22. EOL thresholds
6.3 Radio busy management
For correct software handling of the radio busy signal RFBUSY, additional busy control are
included in the PWR controller. This generates a busy mask RFBUSYMS status based on
MSv62619V1
V
DD
t
hysteresis
V
EOLH
V
EOLL
RFEOLF

ST STM32WL5 Series Specifications

General

Brand	ST
Model	STM32WL5 Series
Category	Microcontrollers
Language	English