RM0453 Rev 1 253/1461
RM0453 Power control (PWR)
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In Shutdown mode, the following features can be selected by programming individual
control bits:
• Real-time clock (RTC): this is configured by the RTCEN bit in the Backup domain
control register (RCC_BDCR).
Caution: In case of V
DD
power-down, the RTC content is lost.
• External 32.768 kHz oscillator (LSE): this is configured by the LSEON bit in the Backup
domain control register (RCC_BDCR)
Exit Shutdown mode
The Shutdown mode is exited according Section 6.5.4. A power-on reset occurs when
exiting from Shutdown mode. All registers (except for the ones in the Backup domain) are
reset after wakeup from Shutdown.
Refer to the table below for more details on how to exit Shutdown mode.
6.5.12 Auto-wakeup from low-power mode
The RTC can be used to wake up the MCU from low-power mode without depending on an
external interrupt (Auto-wakeup mode). The RTC provides a programmable time base for
waking up from Stop (0, 1 or 2) or Standby mode at regular intervals. For this purpose, the
Table 55. Shutdown mode
Shutdown mode Description
Mode entry
WFI (wait for interrupt) or WFE (wait for event) while:
– SLEEPDEEP bit is set in Cortex system control register
– No interrupt (for WFI) or event (for WFE) is pending
– LPMS = 0b1xx in PWR_CR1 and PWR_C2CR1
– WUFx bits are cleared in power status register 1 (PWR_SR1)
On return from ISR while:
– SLEEPDEEP bit is set in Cortex system control register
– SLEEPONEXT = 1
– No interrupt is pending
– LPMS = 0b1xx in PWR_CR1 and PWR_C2CR1
– Radio IRQ is cleared in the sub-GHz radio.
– WPVDF, WRFBUSY and WUFx bits are cleared in power status register 1
(PWR_SR1)
– The RTC flag corresponding to the chosen wakeup source (RTC Alarm A,
RTC Alarm B, RTC wakeup, synchronous binary counter or timestamp
flags) is cleared
– TAMP flags ITAMPxF and TAMPxF are cleared.
Mode exit WKUPx pin edge, RTC and TAMP event, external reset in
NRST pin
Wakeup latency Reset phase
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