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ST STM32WL5 Series User Manual

ST STM32WL5 Series
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RM0453 Rev 1 1109/1461
RM0453 Inter-integrated circuit (I2C) interface
1126
34.6 I2C interrupts
The table below gives the list of I2C interrupt requests.
Table 237. I2C Interrupt requests
Interrupt
acronym
Interrupt
event
Event
flag
Enable
control bit
Interrupt clear
method
Exit the
Sleep
mode
Exit the
Stop 0,
Stop 1,
Stop 2
mode
Exit the
Standby,
Shutdow
n modes
I2C
I2C_EV
Receive buffer
not empty
RXNE RXIE
Read I2C_RXDR
register
Yes
No
No
Transmit buffer
interrupt status
TXIS TXIE
Write I2C_TXDR
register
Stop detection
interrupt flag
STOPF STOPIE
Write
STOPCF=1
Transfer
complete
reload
TCR
TCIE
Write I2C_CR2
with
NBYTES[7:0]
0
Transfer
complete
TC
Write START=1
or STOP=1
Address
matched
ADDR ADDRIE
Write
ADDRCF=1
Yes
(1)
NACK
reception
NACKF NACKIE
Write
NACKCF=1
No
I2C_ER
Bus error BERR
ERRIE
Write
BERRCF=1
Yes No No
Arbitration loss ARLO
Write
ARLOCF=1
Overrun/
Underrun
OVR Write OVRCF=1
PEC error PECERR
Write
PECERRCF=1
Timeout/
t
LOW
error
TIMEOUT
Write
TIMEOUTCF=1
SMBus alert ALERT
Write
ALERTCF=1
1. The ADDR match event can wake up the device from Stop mode only if the I2C instance supports the Wakeup from Stop
mode feature. Refer to Section 34.3: I2C implementation.

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ST STM32WL5 Series Specifications

General IconGeneral
BrandST
ModelSTM32WL5 Series
CategoryMicrocontrollers
LanguageEnglish

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