ST STM32WL5 Series

Inter-integrated circuit (I2C) interface RM0453
1090/1461 RM0453 Rev 1
Figure 297. Transfer bus diagrams for I2C master receiver
MS19865V1
Example I2C master receiver 2 bytes, automatic end mode (STOP)
INIT: program Slave address, program NBYTES = 2, AUTOEND=1, set START
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: rd data2
A
RXNE RXNE
NBYTES
legend:
transmission
reception
SCL stretch
EV1
xx 2
INIT
Example I2C master receiver 2 bytes, software end mode (RESTART)
INIT: program Slave address, program NBYTES = 2, AUTOEND=0, set START
EV1: RXNE ISR: rd data1
EV2: RXNE ISR: read data2
EV3: TC ISR: program Slave address, program NBYTES = N, set START
A
RXNE RXNE
NBYTES
legend:
transmission
reception
SCL stretch
EV1 EV2
xx
INIT
N
EV2
2
TC
AddressS A data1 data2 NA ReS Address
S Address
A
data1
data2
NA P