ST STM32WL5 Series User Manual

RM0453 Rev 1 663/1461
RM0453 AES hardware accelerator (AES)
698
Figure 111 illustrates the cipher block chaining (CBC) encryption.
Figure 111. CBC encryption
In CBC encrypt mode, the first plaintext input block, after bit/byte/half-word swapping (P1’),
is XOR-ed with a 128-bit IVI bitfield (initialization vector and counter), producing the I1 input
data for encrypt with the AES core, using a 128- or 256-bit key. The resulting 128-bit output
block O1, after swapping operation, is used as ciphertext C1. The O1 data is then XOR-ed
with the second-block plaintext data P2’ to produce the I2 input data for the AES core to
produce the second block of ciphertext data. The chaining of data blocks continues in this
way until the last plaintext block in the message is encrypted.
If the message size is not a multiple of 128 bits, the final partial data block is encrypted in
the way explained in Section 23.4.6: AES ciphertext stealing and data padding.
Figure 112 illustrates the cipher block chaining (CBC) decryption.
Figure 112. CBC decryption
In CBC decrypt mode, like in ECB decrypt mode, the secret key must be prepared to
perform an AES decryption.
After the key preparation process, the decryption goes as follows: the first 128-bit ciphertext
block (after the swap operation) is used directly as the AES core input block I1 for decrypt
operation, using the 128-bit or 256-bit key. Its output O1 is XOR-ed with the 128-bit IVI field
(that must be identical to that used during encryption) to produce the first plaintext block P1.
MSv19107V2
Block cipher
encryption
AES_KEYRx (KEY)
AES_DINR (plaintext P1)
AES_DOUTR (ciphertext C1)
Swap
management
DATATYPE[1:0]
DATATYPE[1:0]
Swap
management
Block cipher
encryption
AES_KEYRx (KEY)
AES_DINR (plaintext P2)
AES_DOUTR (ciphertext C2)
Swap
management
DATATYPE[1:0]
DATATYPE[1:0]
Swap
management
AES_IVRx (init. vector)
input
output
Legend
XOR
I1
I2
O1
O2
Block 1 Block 2
IVI
P1'
P2'
MSv19104V2
Decrypt
AES_KEYRx (KEY)
AES_DINR (ciphertext C1)
AES_DOUTR (plaintext P1)
Swap
management
DATATYPE[1:0]
DATATYPE[1:0]
Swap
management
Decrypt
AES_KEYRx (KEY)
AES_DINR (ciphertext C2)
AES_DOUTR (plaintext P2)
Swap
management
DATATYPE[1:0]
DATATYPE[1:0]
Swap
management
AES_IVRx (IV)
input
output
Legend
XOR
I1
I2
O1
O2
Block 1 Block 2
IVI
P1'
P2'

ST STM32WL5 Series Specifications

General

Brand	ST
Model	STM32WL5 Series
Category	Microcontrollers
Language	English