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ST STM32WL5 Series User Manual

ST STM32WL5 Series
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RM0453 Rev 1 365/1461
RM0453 Hardware semaphore (HSEM)
378
8 Hardware semaphore (HSEM)
8.1 Introduction
The hardware semaphore block provides 16 (32-bit) register based semaphores.
The semaphores can be used to ensure synchronization between different processes
running between different cores. The HSEM provides a non blocking mechanism to lock
semaphores in an atomic way. The following functions are provided:
Locking a semaphore can be done in two ways:
2-step lock: by writing COREID and PROCID to the semaphore, followed by a
read check
1-step lock: by reading the COREID from the semaphore
Interrupt generation when a semaphore is unlocked
Each semaphore may generate an interrupt on one of the interrupt lines
Semaphore clear protection
A semaphore is only unlocked when COREID and PROCID match
Global semaphore clear per COREID
8.2 Main features
The HSEM includes the following features:
16 (32-bit) semaphores
8-bit PROCID
4-bit COREID
1 interrupt line per processor
Lock indication

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ST STM32WL5 Series Specifications

General IconGeneral
BrandST
ModelSTM32WL5 Series
CategoryMicrocontrollers
LanguageEnglish

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