EasyManuals Logo

ST STM32WL5 Series User Manual

ST STM32WL5 Series
1461 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #234 background imageLoading...
Page #234 background image
Power control (PWR) RM0453
234/1461 RM0453 Rev 1
The system operation mode depends on the CPU1 and the CPU2 sub-system operating
mode. The system only enters a low-power mode when both sub-systems allow it to do so.
After a system reset, CPU1 is in CRUN mode. CPU2 only boots if enabled by CPU1 via the
C2BOOT bit, or when the system is secure on an illegal access detection. As long as CPU1
does not boot CPU2, the device operates as a single CPU system. CPU1 can enter and
wake up from system low-power modes on its own.
When CPU2 has boot, CPU1, CPU2 and radio sub-systems can enter and wak eup from
system low-power modes on their own.
The system low-power mode to enter depends on the allowed mode selected by the CPUs
in LPMS[2:0] bits in PWR control register 1 (PWR_CR1) and PWR CPU2 control register 1
(PWR_C2CR1).
Figure 25 shows the operating modes state diagram. CPU1 and CPU2 sub-systems
operate interdependently according to their own sub-system states. Each sub-system has
its own wakeup sources, that allow it to wake up from Stop and Standby modes. For the
device to be in Stop, Standby or Shutdown mode, both sub-systems must be in CStop.
When one sub-system enters CRun mode, the device enters Run mode.

Table of Contents

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the ST STM32WL5 Series and is the answer not in the manual?

ST STM32WL5 Series Specifications

General IconGeneral
BrandST
ModelSTM32WL5 Series
CategoryMicrocontrollers
LanguageEnglish

Related product manuals