Analog-to-digital converter (ADC) RM0453
590/1461 RM0453 Rev 1
Bits 31:25 Reserved, must be kept at reset value.
Bit 24 VBATEN: V
BAT
enable
This bit is set and cleared by software to enable/disable the V
BAT
channel.
0: V
BAT
channel disabled
1: V
BAT
channel enabled
Note: The software is allowed to write this bit only when ADSTART = 0 (which ensures that no
conversion is ongoing)
Bit 23 TSEN: Temperature sensor enable
This bit is set and cleared by software to enable/disable the temperature sensor.
0: Temperature sensor disabled
1: Temperature sensor enabled
Note: Software is allowed to write this bit only when ADSTART = 0 (which ensures that no conversion
is ongoing).
Bit 22 VREFEN: V
REFINT
enable
This bit is set and cleared by software to enable/disable the V
REFINT
.
0: V
REFINT
disabled
1: V
REFINT
enabled
Note: Software is allowed to write this bit only when ADSTART = 0 (which ensures that no conversion
is ongoing).
Bits 21:18 PRESC[3:0]: ADC prescaler
Set and cleared by software to select the frequency of the clock to the ADC.
0000: input ADC clock not divided
0001: input ADC clock divided by 2
0010: input ADC clock divided by 4
0011: input ADC clock divided by 6
0100: input ADC clock divided by 8
0101: input ADC clock divided by 10
0110: input ADC clock divided by 12
0111: input ADC clock divided by 16
1000: input ADC clock divided by 32
1001: input ADC clock divided by 64
1010: input ADC clock divided by 128
1011: input ADC clock divided by 256
Other: Reserved
Note: Software is allowed to write these bits only when the ADC is disabled (ADCAL = 0,
ADSTART = 0, ADSTP = 0, ADDIS = 0 and ADEN = 0).
Bits 17:0 Reserved, must be kept at reset value.
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