EasyManua.ls Logo

Cmsemicon CMS32L051 - Page 182

Default Icon
703 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
V1.2.2
CMS32L051 User Manual |Chapter 5 Universal Timer Unit (Timer4)
www.mcu.com.cn 182 / 703
Figure 5-60 Operation procedure for delay counter function
software operation hardware state
Timer Unit m input clock is in stopped state (stop providing
clock, not able to write into registers)
set TM4mEN bit of peripheral enable register 0
(PER0) to '1'
Timer Unit m input clock is in active state, all channels in
operation stopped state.
(start providing clock, can write all registers)
configure Timer clock selection register
m(TPSm), confirm CKm0~CKm3 clock
frequency
Channel Initial
configuration
set corresponding bit of noise filter enable
register 1 (NFEN1) to '0' (OFF) or '1' (ON).
Configure Timer mode register mn (TMRmn)
(confirm channel operation mode).
Configure output delay time via timer data
register mn (TDRmn)
Set T0Emn bit to '0', and stop T0mn operation.
channel in operation stopped state
(providing clock, consume portion of power)
set TSmn bit to '1'.
Because TSmn bit is trigger bit, thus
automatically return to '0'.
TEmn bit turns into '1' and enter into start trigger (detect Timn
pin input valid edge or set TSmn bit to '1') detection waiting
state.
start decremental counting while detecting
next start trigger.


load TDRmn register value into Timer counting register mn
(TCRmn)
in operation
can modify any TDRmn register configuration
value.
Can read TCRmn register anytime.
Do not use TSRmn register.
Counter (TCR00) performs decremental counting. When
TCRmn count reaches '0000H', then generate INTTMmn and
before detecting the next start trigger (detect TImn pin input
valid edge or set TSmn bit to '1'), TCRmn is "0000H" and stop
counting.
stop operation
set TTmn bit to '1'.
Because TTmn bit is trigger bit, thus
automatically return to '0'.
TEmn bit turns into '0' and stop counting.
TCRmn register hold counted value and stop counting.
Timer 4 stop
set TM4mEN bit of peripheral enable register 0
(PER0) to '0'
Timer Unit m input clock is not been provided.Perform
initialization to all circuit and SFR of all channels.
Timer 4 initial
configuration
Start operation
restart operation
Remark: m: Unit number (m= 0,1) n: channel number (n=0 ~ 3).

Table of Contents

Related product manuals