CMS32L051 User Manual |Chapter 9 Clock output/Buzzer Output Controller
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9.3.2 Registers for controlling the function of the clock output/buzzer output pin port
This product can multiplex the clock output/buzzer output function CLKBUZ0 to any port except RESETB,
and CLKBUZ1 can be multiplexed to P15. When using the clock output/buzzer output function, the port
multiplexing function configuration register (Pxx CFG), port register (Pxx), port mode register (PMxx), and port
mode control register (PMCxx) must be set. For details, please refer to Chapter 2 Pin Functions.
The multiplexed port, which is configured as a clock output/buzzer output pin, must have 0 in the
corresponding port register (Pxx), the bits of the port mode register (PMxx), and the port mode control register
(PMCxx).
(Example) P20 as clock output/buzzer output (CLKBUZ0):
Set the P20 bit of Port Register 2 to 0.
Set the PM20 bit of Port Mode Register 2 to 0.
Set the PMC20 bit of Port Mode Control Register 2 to 0.
Set P20CFG of Port Multiplex Function Configuration Register to 0x07.
If P15 is used as clock output/buzzer output (CLKBUZ1):
Set the P15 bit of Port Register 1 to 0.
Set the PM15 bit of Port Mode Register 1 to 0.
Set the PMC15 bit of Port Mode Control Register 1 to 0.
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