Cmsemicon CMS32L051 - Page 409

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CMS32L051 User Manual |Chapter 12 Universal Serial Communication Unit
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Figure 12-94 Flowchart of slave send and receive (continuous send and receive mode)
SSPI communication starts
configure transmit and receive
data
enable interrupt
Wait for the transfer to end
relevant initial configuration, refer to diagram
19-93(select buffer empty interrupt)
regarding transmit data, configure storage region and
data count (via software, any specified internal RAM
storage region, transmit data pointer communnication
data count)
after clear interrupt request flag(Ifxx) and release
interrupt mask(MKxx), enable interrupt
start communication via clock provided by
master device.
except 1st interrupt, read received data
and write into storage region, update
receive data pointer
SCI initial configuration
buffer empty/transmit completion
interrupt
BFFmn=1？
read receiving data to
SIOp(=SDRmn[7:0])
RETURN
communication data count =0?
disable interrupt (mask).
set STmn bit to 1.
communication completed.
Yes
No
No
Yes
main program
interrupt process program
main program
if buffer empty or transmit completion
interrupt occurs, jump to interrupt process
program.

 

communication data count -1
continue communicating?
write MDmn 0 bit to 1


communication data count？
write MDmn 0 bit to 0
write transmit data into
SIOp(=SDRmn[7:0])
Yes
=0
2

=1
No
if there is data to be transmitted (communication data count
>=2), then read data from storage region and write into SIOp,
update storage pointer. If transmit completes
(communication data count = 1), then modify bit of transmit
completion interrupt.
Note Data must be sent to the SIOp register settings before the master device starts the output clock.
Remark 1. (1) to (8) in the figure corresponds to (1) to (8) in the Timing diagram of Figure 12-93.
2.m: Unit number (m=0) n: Channel number (n=0) p: SSPI number (p=00).