Cmsemicon CMS32L051 - Page 46

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CMS32L051 User Manual |Chapter 2 Pin Function
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Table 2-10 Example of register settings when using P30 to P31 pin functions
Pin
nam
e
Features used
PMCx
x
PMx
x
Px
x
POMx
x
PxxCFG
(Output
Multiplexin
g
Configurati
on
Register)
xxPCFG (Input
Multiplexing Configuration
Register)
SPIPCF
G
remark
The feature name
Input/outp
ut
P30
P30
input
0
1
×
×
×
×
×
output
0
0
0/1
0

h0
×
×
N-channel
open-drain
output
0
0
0/1
1
×
ANI21
Analog
channel
1
×
×
×
×
×
×
INTP3
input
0
1
×
×
×
INTP3PCFG=6'h00
×
INTP3 can also be
mapped to other ports,
see 2.3.9
RTC1HZ
output
0
0
0
0

h0
×
×
Mappable concurrent
inputs
input
0
1
×
×
×
Configure xxPCFG
×
Please refer to 2.3.9
Mappable concurrent
output
output
0
0
0/1
0
Configure
P30CFG
×
×
Please refer to 2.3.10
Mappable
bidirectional
communication
(SDA00/SDAA0/SCL
A0)
bidirection
al
0
0
0/1
1

h0
Configure
SDI00PCFG/SDAA0PCF
G/SCLA0PCFG
×
Please refer to 2.3.9
P31
P31
input
0
1
×
×
×
×
×
output
0
0
0/1
0

h0
×

N-channel
open-drain
output
0
0
0/1
1

ANI22
Analog
channel
1
×
×
×
×
×
×
TI03
input
0
1
×
×
×
×
×
TO03
output
0
0
0
0

h0
×

SPI_SCK
input
0
1
×
×
×
×

Please refer to 2.3.11
output
0
0
0
0
×
×
Mappable concurrent
inputs
input
0
1
×
×
×
Configure xxPCFG
×
Please refer to 2.3.9
Mappable concurrent
output
output
0
0
0/1
0
Configure
P31CFG
×

Please refer to 2.3.10
Mappable
bidirectional
communication
(SDA00/SDAA0/SCL
A0)
bidirection
al
0
0
0/1
1

h0
Configure
SDI00PCFG/SDAA0PCF
G/SCLA0PCFG

Please refer to 2.3.9