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V1.2.2

CMS32L051 User Manual |Chapter 2 Pin Function

www.mcu.com.cn 45 / 703

Pin

na

me

Features used

PMCxx

PMxx

Pxx

POMxx

PxxCFG

(Output

Multiplexing

Configuration

Register)

xxPCFG (Input Multiplexing

Configuration Register)

SPIPCFG

remark

The feature name

Input/output

P24

P24

input

0

1

×

×

×

×

×

output

0

0

0/1

0



0

×



N-channel

open-drain

output

0

0

0/1

1



ANI4

Analog

channel

1

×

×

×

×

×

×

SPI_SCK

input

0

1

×

×

×

×



Please refer to

2.3.11

output

0

0

0

0

×

×

Mappable

concurrent inputs

input

0

1

×

×

×

Configure xxPCFG

×

Please refer to

2.3.9

Mappable

concurrent output

output

0

0

0/1

0

Configure

P24CFG

×



Please refer to

2.3.10

Mappable

bidirectional

communication

(SDA00/SDAA0/S

CLA0)

bidirectional

0

0

0/1

1



0

Configure

SDI00PCFG/SDAA0PCFG/

SCLA0PCFG



Please refer to

2.3.9

P25

P25

input

0

1

×

×

×

×

×

output

0

0

0/1

0



0

×

×

N-channel

open-drain

output

0

0

0/1

1

×

ANI5

Analog

channel

1

×

×

×

×

×

×

SPI_NSS

input

0

1

×

×

×

×



Please refer to

2.3.11

Mappable

concurrent inputs

input

0

1

×

×

×

Configure xxPCFG

×

Please refer to

2.3.9

Mappable

concurrent output

output

0

0

0/1

0

Configure

P25CFG

×

×

Please refer to

2.3.10

Mappable

bidirectional

communication

(SDA00/SDAA0/S

CLA0)

bidirectional

0

0

0/1

1



0

Configure

SDI00PCFG/SDAA0PCFG/

SCLA0PCFG

×

Please refer to

2.3.9

P26

P26

input

0

1

×

×

×

×

×

output

0

0

0/1

0



0

×

×

N-channel

open-drain

output

0

0

0/1

1

×

ANI6

Analog

channel

1

×

×

×

×

×

×

Mappable

concurrent inputs

input

0

1

×

×

×

Configure xxPCFG

×

Please refer to

2.3.9

Mappable

concurrent output

output

0

0

0/1

0

Configure

P26CFG

×

×

Please refer to

2.3.10

Mappable

bidirectional

communication

(SDA00/SDAA0/S

CLA0)

bidirectional

0

0

0/1

1



0

Configure

SDI00PCFG/SDAA0PCFG/

SCLA0PCFG

×

Please refer to

2.3.9

P27

P27

input

0

1

×

×

×

×

×

output

0

0

0/1

0



0

×

×

N-channel

open-drain

output

0

0

0/1

1

×

ANI7

Analog

channel

1

×

×

×

×

×

×

Mappable

concurrent inputs

input

0

1

×

×

×

Configure xxPCFG

×

Please refer to

2.3.9

Mappable

concurrent output

output

0

0

0/1

0

Configure

P27CFG

×

×

Please refer to

2.3.10

Mappable

bidirectional

communication

(SDA00/SDAA0/S

CLA0)

bidirectional

0

0

0/1

1



0

Configure

SDI00PCFG/SDAA0PCFG/

SCLA0PCFG

×

Please refer to

2.3.9

Table of Contents

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