Cmsemicon CMS32L051

To Next Page

To Previous Page

V1.2.2

CMS32L051 User Manual |Chapter 2 Pin Function

www.mcu.com.cn 50 / 703

Table 2-14 Example of register settings when using the P70 to P75 pin functions

nam

Features used

PMCx

PMx

POMx

PxxCFG

(Output

Multiplexing

Configuratio

n Register)

xxPCFG (Input Multiplexing

Configuration Register)

SPIPCF

remark

The feature name

Input/outp

P70

input

output

0/1



N-channel

open-

drain

output

0/1

ANI29

Analog

channel

KR0

input

SCLK21

input

output



SCL21

output



Mappable

concurrent inputs

input

Configure xxPCFG

Please refer

to 2.3.9

Mappable

concurrent output

output

0/1

Configure

the

P70CFG

Please refer

to 2.3.10

Mappable

bidirectional

communication

(SDA00/SDAA0/SCL

A0)

bidirection

0/1



Configure

SDI00PCFG/SDAA0PCFG/SCLA0

PCFG

Please refer

to 2.3.9

P71

input

output

0/1



N-channel

open-

drain

output

0/1

ANI30

Analog

channel

KR1

input

SDI21

input

SDA21

bidirection



Mappable

concurrent inputs

input

Configure xxPCFG

Please refer

to 2.3.9

Mappable

concurrent output

output

0/1

Configure

the

P71CFG

Please refer

to 2.3.10

Mappable

bidirectional

communication

(SDA00/SDAA0/SCL

A0)

bidirection

0/1



Configure

SDI00PCFG/SDAA0PCFG/SCLA0

PCFG

Please refer

to 2.3.9

P72

input

output

0/1



N-channel

open-

drain

output

0/1

ANI31

Analog

channel

KR2

input

SDO21

output

Mappable

concurrent inputs

input

Configure xxPCFG

Please refer

to 2.3.9

Mappable

concurrent output

output

0/1

Configure

P72CFG

Please refer

to 2.3.10

Mappable

bidirectional

communication

(SDA00/SDAA0/SCL

A0)

bidirection

0/1



Configure

SDI00PCFG/SDAA0PCFG/SCLA0

PCFG

Please refer

to 2.3.9

Main Page

Cmsemicon CMS32L051 - Page 50

Table of Contents

Related product manuals