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V1.2.2

CMS32L051 User Manual |Chapter 2 Pin Function

www.mcu.com.cn 51 / 703

Pin

name

Features used

PMC

xx

PMxx

Pxx

POMxx

PxxCFG

(Output

Multiplexing

Configuration

Register)

xxPCFG (Input

Multiplexing Configuration

Register)

SPIPCFG

remark

The feature name

Input/output

P73

P73

input

0

1

×

×

×

×

×

output

0

0

0/1

0



×

×

N-channel

open-drain

output

0

0

0/1

1

×

ANI32

Analog

channel

1

×

×

×

×

×

×

KR3

input

0

1

×

×

×

×

×

SDO01

output

0

1

×

×

×

×

×

Mappable

concurrent inputs

input

0

1

×

×

×

Configure xxPCFG

×

Please refer to

2.3.9

Mappable

concurrent output

output

0

0

0/1

0

Configure the

P73CFG

×

×

Please refer to

2.3.10

Mappable

bidirectional

communication

(SDA00/SDAA0/S

CLA0)

bidirectional

0

0

0/1

1



Configure

SDI00PCFG/SDAA0PCFG

/SCLA0PCFG

×

Please refer to

2.3.9

P74

P74

input

0

1

×

×

×

×

×

output

0

0

0/1

0



×



N-channel

open-drain

output

0

0

0/1

1



ANI33

Analog

channel

1

×

×

×

×

×

×

KR4

input

0

1

×

×

×

×

×

SDI01

input

0

1

×

×

×

×

×

SDA01

bidirectional

0

0

1

1



×



SPI_MOSI

input

0

1

×

×

×

×



Please refer to

2.3.11

output

0

0

0

0

×

×

Mappable

concurrent inputs

input

0

1

×

×

×

Configure xxPCFG

×

Please refer to

2.3.9

Mappable

concurrent output

output

0

0

0/1

0

Configure

P74CFG

×



Please refer to

2.3.10

Mappable

bidirectional

communication

(SDA00/SDAA0/S

CLA0)

bidirectional

0

0

0/1

1



Configure

SDI00PCFG/SDAA0PCFG

/SCLA0PCFG



Please refer to

2.3.9

P75

P75

input

0

1

×

×

×

×

×

output

0

0

0/1

0



×



N-channel

open-drain

output

0

0

0/1

1



ANI34

Analog

channel

1

×

×

×

×

×

×

KR5

input

0

1

×

×

×

×

×

SCLK01

input

0

1

×

×

×

×

×

output

0

0

1

0



×



SCL01

output

0

0

1

0



×



SPI_MISO

input

0

1

×

×

×

×



Please refer to

2.3.11

output

0

0

0

0

×

×

Mappable

concurrent inputs

input

0

1

×

×

×

Configure xxPCFG

×

Please refer to

2.3.9

Mappable

concurrent output

output

0

0

0/1

0

Configure the

P75CFG

×



Please refer to

2.3.10

Mappable

bidirectional

communication

(SDA00/SDAA0/S

CLA0)

bidirectional

0

0

0/1

1



Configure

SDI00PCFG/SDAA0PCFG

/SCLA0PCFG



Please refer to

2.3.9

Table of Contents

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