RM0390 Rev 4 1107/1328
RM0390 USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS)
1264
OTG_HPRT 0x440 Section 31.15.24: OTG host port control and status register (OTG_HPRT)
OTG_HCCHARx
0x500
0x520
...
0x660
Section 31.15.25: OTG host channel x characteristics register
(OTG_HCCHARx) (x = 0..15[HS] / 11[FS], where x = Channel number) for
USB_OTG FS
OTG_HCCHARx
0x500
0x520
...
0x6E0
Section 31.15.25: OTG host channel x characteristics register
(OTG_HCCHARx) (x = 0..15[HS] / 11[FS], where x = Channel number) for
USB_OTG HS
OTG_HCSPLTx
0x504
0x524
....
0x6E4
Section 31.15.26: OTG host channel x split control register
(OTG_HCSPLTx) (x = 0..15, where x = Channel number)
OTG_HCINTx
0x508
0x528
....
0x668
Section 31.15.27: OTG host channel x interrupt register (OTG_HCINTx)
(x = 0..15[HS] / 11[FS], where x = Channel number) for USB_OTG FS
OTG_HCINTx
0x508
0x528
....
0x6E8
Section 31.15.27: OTG host channel x interrupt register (OTG_HCINTx)
(x = 0..15[HS] / 11[FS], where x = Channel number) for USB_OTG HS
OTG_HCINTMSKx
0x50C
0x52C
....
0x66C
Section 31.15.28: OTG host channel x interrupt mask register
(OTG_HCINTMSKx) (x = 0..15[HS] / 11[FS], where x = Channel number)
for USB_OTG FS
OTG_HCINTMSKx
0x50C
0x52C
....
0x6EC
Section 31.15.28: OTG host channel x interrupt mask register
(OTG_HCINTMSKx) (x = 0..15[HS] / 11[FS], where x = Channel number)
for USB_OTG HS
OTG_HCTSIZx
0x510
0x530
....
0x670
Section 31.15.29: OTG host channel x transfer size register
(OTG_HCTSIZx) (x = 0..15[HS] / 11[FS], where x = Channel number) for
USB_OTG FS
OTG_HCTSIZx
0x510
0x530
....
0x6F0
Section 31.15.29: OTG host channel x transfer size register
(OTG_HCTSIZx) (x = 0..15[HS] / 11[FS], where x = Channel number) for
USB_OTG HS
OTG_HCDMAx
0x514
0x534
....
0x6F4
Section 31.15.30: OTG host channel x DMA address register
(OTG_HCDMAx) (x = 0..15, where x = Channel number)
Table 224. Host-mode control and status registers (CSRs) (continued)
Acronym
Offset
address
Register name
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