Reset and clock control (RCC) RM0390
118/1328 RM0390 Rev 4
Figure 14. Clock tree
1. For full details about the internal and external clock source characteristics, refer to the Electrical
characteristics section in the device datasheet.
2. When TIMPRE bit of the RCC_DCKCFGR register is reset, if APBx prescaler is 1, then TIMxCLK = PCLKx,
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