RM0390 Rev 4 73/1328
RM0390 Embedded Flash memory interface
87
Table 9. Description of the option bytes
Option bytes (word, address 0x1FFF C000)
RDP: Read protection option byte.
The read protection is used to protect the software code stored in Flash memory.
Bits 15:8
0xAA: Level 0, no protection
0xCC: Level 2, chip protection (debug and boot from RAM features disabled)
Others: Level 1, read protection of memories (debug features limited)
USER: User option byte
This byte is used to configure the following features:
Select the watchdog event: Hardware or software
Reset event when entering the Stop mode
Reset event when entering the Standby mode
Bit 7
nRST_STDBY
0: Reset generated when entering the Standby mode
1: No reset generated
Bit 6
nRST_STOP
0: Reset generated when entering the Stop mode
1: No reset generated
Bit 5
WDG_SW
0: Hardware watchdog
1: Software watchdog
Bit 4 0x0: Not used. Do not change the default value of this bit which is “0” out of fab.
Bits 3:2
BOR_LEV: BOR reset Level
These bits contain the supply level threshold that activates/releases the reset.
They can be written to program a new BOR level value into Flash memory.
00: BOR Level 3 (VBOR3), brownout threshold level 3
01: BOR Level 2 (VBOR2), brownout threshold level 2
10: BOR Level 1 (VBOR1), brownout threshold level 1
11: BOR off, POR/PDR reset threshold level is applied
For full details on BOR characteristics, refer to the Electrical characteristics
section of the product datasheet.
Bits 1:0 0x1: Not used
Option bytes (word, address 0x1FFF C008)
Bit 15
SPRMOD: Selection of Protection Mode of nWPRi bits
0: nWPRi bits used for sector i write protection (Default)
1: nWPRi bits used for sector i PCROP protection (Sector)
Bits 14:8 Reserved
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