RM0390 Rev 4 139/1328
RM0390 Reset and clock control (RCC)
175
6.3.8 RCC APB1 peripheral reset register (RCC_APB1RSTR)
Address offset: 0x20
Reset value: 0x0000 0000
Access: no wait state, word, half-word and byte access.
Bit 0 FMCRST: Flexible memory controller module reset
Set and cleared by software.
0: does not reset the FMC module
1: resets the FMC module
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res. Res.
DAC
RST
PWR
RST
CECRS
T
CAN2
RST
CAN1
RST
FMPI2C1
RST
I2C3
RST
I2C2
RST
I2C1
RST
UART5
RST
UART4
RST
UART3
RST
UART2
RST
SPDIFRX
RST
rw rw rw rw rw rw rw rw rw rw rw rw rw
1514131211109 8 7654321 0
SPI3
RST
SPI2
RST
Res. Res.
WWDG
RST
Res. Res.
TIM14
RST
TIM13
RST
TIM12
RST
TIM7
RST
TIM6
RST
TIM5
RST
TIM4
RST
TIM3
RST
TIM2
RST
rw rw rw rw rw rw rw rw rw rw rw rw
Bits 31:30 Reserved, must be kept at reset value.
Bit 29 DACRST: DAC reset
Set and cleared by software.
0: does not reset the DAC interface
1: resets the DAC interface
Bit 28 PWRRST: Power interface reset
Set and cleared by software.
0: does not reset the power interface
1: resets the power interface
Bit 27 CECRST: CEC reset
Set and cleared by software.
0: does not reset CEC
1: resets CEC
Bit 26 CAN2RST: CAN2 reset
Set and cleared by software.
0: does not reset CAN2
1: resets CAN2
Bit 25 CAN1RST: CAN1 reset
Set and cleared by software.
0: does not reset CAN1
1: resets CAN1
Bit 24 IFMPI2C1RST: FMPI2C1 reset
Set and cleared by software
0: does not reset FMPI2C1
1: resets FMPI2C1