USB on-the-go full-speed/high-speed (OTG_FS/OTG_HS) RM0390
1088/1328 RM0390 Rev 4
Figure 403. USB_FS peripheral-only connection
1. Use a regulator to build a bus-powered device.
31.6.1 SRP-capable peripheral
The SRP capable bit in the Global USB configuration register (SRPCAP bit in
OTG_GUSBCFG) enables the OTG_FS/OTG_HS to support the session request protocol
(SRP). In this way, it allows the remote A-device to save power by switching off V
BUS
while
the USB session is suspended.
The SRP peripheral mode program model is described in detail in the B-device session
request protocol section.
31.6.2 Peripheral states
Powered state
The V
BUS
input detects the B-session valid voltage by which the USB peripheral is allowed
to enter the powered state (see USB2.0 section 9.1). The OTG_FS/OTG_HS then
automatically connects the DP pull-up resistor to signal full-speed device connection to the
host and generates the session request interrupt (SRQINT bit in OTG_GINTSTS) to notify
the powered state.
The V
BUS
input also ensures that valid V
BUS
levels are supplied by the host during USB
operations. If a drop in V
BUS
below B-session valid happens to be detected (for instance
because of a power disturbance or if the host port has been switched off), the
OTG_FS/OTG_HS automatically disconnects and the session end detected (SEDET bit in
OTG_GOTGINT) interrupt is generated to notify that the OTG_FS/OTG_HS has exited the
powered state.
In the powered state, the OTG_FS/OTG_HS expects to receive some reset signaling from
the host. No other USB operation is possible. When a reset signaling is received the reset
detected interrupt (USBRST in OTG_GINTSTS) is generated. When the reset signaling is
complete, the enumeration done interrupt (ENUMDNE bit in OTG_GINTSTS) is generated
and the OTG_FS/OTG_HS enters the Default state.
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